Quarter adders



Nov. 24, 1959 w. F. STEAGALL 2,914,751

QUARTER ADDERS Filed April 26, 1955 FIG. l

28 +V 7 Outp t 0 q -V 2 24 Full wave 25 Reciifier Load Circuit +V KPH:

FIG. 2.

A. Input A O 8. Input 8 O '0. Out put 0 Time TI 12 T3 H- T5 T6 T7 T8 T9 TIO INVENTOR. WILLIAM F. STEAGALL AGENT QUARTER ADDERS William F. Steagall, Merchantville, N J., assignor to Sperry Rand Corporation, New York, N.Y., a corporation of Delaware Application April 26, 1955, Serial No. 503,973

13 Claims. (Cl. 340-174) Input A Input 13 As will be seen from an examination of the foregoing table, the presence of one or the other but not both of two input signals effects an output signal, while the simultaneous presence or absence of the said two input signals results in there being no output signal. Units capable of performing quarter addition in accordance with the preceding truth table form a basic portion of more complex computation devices.

In the past, quarter adders have utilized vacuum tube circuitry for the most part and have accordingly been subject to the disadvantages that they are relatively fragile in construction and subject to operating failures. The present invention serves to obviate the foregoing disadvantages and in so doing provides a quarter adder structure utilizing a pulse transformer as the basic portion thereof. In particular, the present invention relates to an improved form of input circuit for use with such pulse transformers whereby quarter addition may be performed in an improved manner.

It is accordingly an object of the present invention to provide improved quarter adders for use in computing applications.

A further object of the present invention resides in the provision of an improved quarter adder device which is more rugged in construction and less subject to operating failures than has been the case heretofore.

Still another object of the present invention resides in the provision of a quarter adder device employing a pulse transformer as a basic component thereof.

Another object of the present invention resides in the provision of improved input circuits for use with transformers whereby such transformers may act as quarter adders.

A still further object of the present invention resides in the provision of improved devices for performing quarter addition, which devices are selectively responsive to the simultaneity or lack thereof of two input signals to produce a characteristic output.

As has been mentioned previously, the present invention, in effecting the foregoing objects, preferably utilizes a pulse transformer, and two signals, which have been termed Input A and Input B in the truth table given to atnt f above, are coupled respectively to the primary side of the said transformer. In practice, the said primary side of the transformer T may comprise a center tapped winding, whereby clamp means may be readily introduced to enhance the operation of the device; and the input A and Input B signals may be coupled to spaced points on, or opposite ends of, the said primary winding. By utilizing such a transformer construction, the presence of one only of the said two possible inputs will effect a current flow in the transformer primary winding and this current flow will in turn induce a voltage in the transformer secondary. However, if both inputs should be applied to the primary side of the transformer simultaneously, they effectively nullify one another whereby no voltage is induced in the transformer secondary and no output may be taken therefrom. When so employed, therefore, the

pulse transformer configuration of the present invention operates in strict conformity with the truth table given previously.

The foregoing objects, advantages, construction and operation of the present invention will become more readily apparent from the following description and accompanying drawings, in which:

Figure l is a schematic diagram of a quarter adder in accordance with a preferred embodiment of the present invention; and

Figure 2 (A through C) is a waveform diagram illustrative of the operation of the device shown in Figure 1.

Referring now to the figures, it will be seen that, in accordance with a preferred embodiment of the present invention, a quarter adder may comprise a pulse transformer having a primary winding 20 center tapped at a point 21. One end of the said winding 20 is coupled via a rectifier D3 to an Input A terminal 22, while the other end of the said primary winding 20 is coupled via a further rectifier D4 to an Input B terminal 23. The center tap 21 of primary winding 20 is connected via a resistor R1 to a source of negative potential V and a further rectifier D5 is coupled from the said center tap 21 to ground. The transformer T further employs a secondary winding 24 center tapped at a point 2:5, and the said center tapped secondary is coupled to a load circuit 26, including a full wave rectifier of any desired configuration whereby the output of the circuit may be taken at a terminal 27. It will be understood, of course,

i that the particular secondary winding configuration shown is illustrative only and other arrangements will suggest themselves to those skilled in the art.

Referring now to the operation of the device shown in Figure 1, it will be seen that the pulses comprising input A and input B are preferably positive-going from a base value -V, as is illustrated by the waverorrns ad acent each of the terminals 22 and 23 and by the waveforms of Figures 2A and 2B. This particular pulse configuration is chosen, as will become apparent, so that when but a single input appears at either terminal 22 or terminal 23, the other input terminal is supplied by a negative potential V, serving to lteep its associated rectifier in a non-conductive state. By this arrangement, therefore, current flow through one portion of the center tapped primary 20, due to the application of a single input pulse at either terminal 22 or terminal 23, is restricted to that portion of the primary winding only and cannot fiow through the other portion of the center tapped primary to which no pulse has been applied. The resistor R1 is so chosen that in the absence of inputs at either terminals 22 or 23, or in the presence of but a single input at one of the terminals 22 and 23, a current flows from ground via a rectifier D5 and resistor R1 to the source of negative potential V, whereby the center Patented Nov. 24, 1959 tap 21 of primary winding 20 is clamped at substantially ground potential.

Assuming now that an Input A pulse appears at the terminal 22 during a time interval'tZ to 3, for instance (see Figure 2), the'said Input A pulse will cause a current to flow -via rectifier D3- and the upper portion of center tapped primary winding 29 to the center tap 21 which is at this timeeiiectivelyat ground potential. The current so flowing is prevented from flowing through the lower portion of center tapped primary winding 20 inasmuch as rectifier D4 is cut oif in the absence of a positive-going input pulse at terminal 23. The application of an Input A pulse at terminal 22, therefore, causes a voltage to be induced in the secondary 24 of transformer T and due to the known action of the full wave rectifier in load circuit 26, a positive-going output pulse will appear at terminal 27.

By a similar analogy it will be seen that if an Input B pulse should be applied to the terminal 23 during a time 1 interval 4 to t5, .for instance (see Figure 2),. during which timeinterval there is no positive-going Input A pulse at terminal 22, a furthercurrentwill flow through.

the rectifier D4 and through the lower portion of..cen-

ter tapped primary Ztlto thevcenter tap 21 which is still effectively at ground potential.

Again, therefore, a volt-- age will be induced in the secondary winding 24 thereby to effect a positive-going output pulse at output terminal from one only of said signal sources causing a flux change in at least a portion of said first coil, clamp means coupled to a point on said first coil substantially intermediate the points of coupling of said first and second signal sources thereby to maintain said intermediate point at a predetermined potential in the absence of simultaneity of signals from said first and second signal sources, said clamp means including a normally conductive diode responsive to simultaneous signals from said first and second signal sources thereby to become non-conductive whereby the potential at said intermediate point varies from 'said predetermined potential in response to simultaneous signals from said first and second signal means,

a second coil inductively coupled to said first coil for signal sources selectivelyv exhibiting signal excursions of opposite polarity thereby to render said rectifier means selectively conductive, a current return path'coupled to said primary winding between a point thereon and said first and second signal sources whereby a signal excursion of said opposite polarity from one only of said signal sources efiects current flow through a, portion of I said primary winding to said current return path, said pulse appears at the output terminal 27. In practice, the

simultaneous application of input pulses at both terminals 22 and '23 causes theprimary winding to offer negligibleimpedanceto the pulses due to the lack of a flux change in the transformer. ,As a result of such negligible impedance, the voltage across resistor'Rl is increased, causing the center tap 21 ofthe primary winding 20 to be raised above groundpotential. Consequently, the diode D5 is cut off and the resistor.R1 prevents any excessive current fio w in the winding 20. Therefore, the clamp circuit R1D5 has a dual function: it acts as a low impedance substantially to ground when, none or only one of the input pulses are applied to the input terminals 22, 23; and it acts asa high impedance when both of the input pulses are applied, thereby acting to limit current flow by preventing the input pulses from of Input B pulses act as a return path for current flow effected by Input A pulses, Therefore, the arrangement described may utilize high impedance pulse'sourcesjif desired. j j' While a preferred embodiment of the pre'sentinvention hasbeen described, it must be understood that the foregoing description is meantto be illustrative only-and 18. not limitative of my invention. Many variations will be; suggested to those skilled in the art and all such variations as are in accord with the principles discussed previously are meant to fall within the scope of the pres- I ent invention as set forth in the appended claims. Having thus described my invention, I claim:

current return path including control means responsive to simultaneous occurence of signal excursions of said opposite polarity from both said signal sources for offectively limiting current flow .in said primary winding and means coupled to said secondary winding and responsive to a potential induced therein. by current flow in a portion of said primarywinding for: producing an output signal.

' 3. The control circuit of claim 2 wherein said primary Winding includes a center tap, said current return path and control means including potential 'clamp'fmeans.

It should be notedthat because, of the action coupled to said, center tap for-maintaining-said center tap at a predetermined potential in the absence of simultaneity of like signal excursions of said opposite polarity from said'first and seco-ndsighalsources. v I a 4. A quarter adder comprising a single core of magnetic'material, first and second coils carried by said core and'inductively coupled to one another, first and second signal sources coupled to spaced points on saidfirst coil, a current return path coupled to said first coil 'at a point substantially intermediate said spaced points whereby a signal from one of said signal sources efiectssubstantial current flow, in said first coil via said current return path,

said current return path including control means respon-' sive to simultaneous application of signals from said first and second signal sources. forvcontrolling said current return path, to prevent excessive current flow in said first coil via said current return path upon the simultaneous application of signals from'said first and second .Sigl al sources and means coupled to said second coil a'nd responsive to potentials induced in said second coil due to substanti'al current flow in said first co-il for producing I an output signal.

i l A quarter adder comprising first and second signal sources coupled to a'fi'rst' coil, the application of a signal 5. The quarter ep of claim 4 wherein said control means comprises clamp means for maintaining said substantially intermediate point at a predetermined potential in the absence of said simultaneousapplication of'signals,

'6. The quarter adderof claim 4 wherein: each of said signal sources is coupled to said firstcoil yia'rectifier means, said signal sources each having a base potential a first polarity and embiting selective signal excur- $1.0ns of opposite polarity whereby said rectifier means;

are maintained non-conductive in the absence of said selective signal excursions.

7. A quarter adder comprising first and second coils inductively coupled to one another, a first signal source coupled to one end of said first coil, a second signal source coupled to the other end of said first coil, potential clamp means coupled to a center tap on said first coil, said clamp means including a diode having a current source coupled thereto for normally maintaining said diode conductive to render said clamp means operative in the absence of simultaneous signals from said first and second signal sources, said current source being so selected that said diode is rendered non-conductive to render said clamp means inoperative in response to the application of such simultaneous signals, from said first and second signal sources, and output means coupled to said second coil.

8. The circuit of claim 7 in which each of said signal sources is coupled to said first coil by a rectifier, and means maintaining each of said rectifiers non-conductive in the absence of a signal from its respective signal source.

9. A control circuit comprising a core of magnetic material having a primary winding and a secondary winding thereon, said primary winding having a center tap, a first signal source coupled via first rectifier means to said primary winding, a second signal source coupled via second rectifier means to said primary winding, each of said signal sources having a base potential level of polarity tending to maintain the associated one of said rectifier means non-conductive, and each of said signal sources selectively exhibiting signal excursions of opposite polarity thereby to render said associated rectifier means selectively conductive, a current return path coupled to said primary winding between said center tap and said first and second signal sources whereby a signal excursion of said opposite polarity from one only of said signal sources effects current flow through a portion of said primary winding to said current return path, said current return path including control means responsive to simultaneous occurrence of signal excursions of said opposite polarity from both said signal sources for effectively controlling said current return path thereby to limit current flow in said primary Winding, and means coupled to said secondary winding and responsive to a potential induced therein by current flow in a portion of said primary winding for producing an output signal, said current return path and control means including potential clamp means coupled to said center tap for maintaining said center tap at a predetermined potential in the absence of simultaneity of like signal excursions of said opposite polarity from said first and second signal sources, said clamp means comprising a diode coupled between said center tap and a point of ground potential, and a source of direct potential coupled via a resistor to said diode for normally maintaining said diode conductive in the absence of simultaneous like signal excursions of said opposite polarity from said first and second signal sources.

10. A quarter adder comprising a single core of magnetic material, first and second coils carried by said core and inductively coupled to one another, first and second signal sources coupled to spaced points on said first coil, a current return path coupled to said first coil at a point substantially intermediate said spaced points whereby a signal from one of said signal sources eflects substantial current flow in said first coil via said current return path, said current return path including control means responsive to simultaneous application of signals from said first and second signal sources for controlling said current return path to prevent excessive current flow in said first coil via said current return path with the simultaneous application of signals from said first and second signal sources, and means including a full wave rectifier coupled to said second coil and responsive to potentials induced in said second coil due to substantial current fiow in said first coil for producing an output signal.

11. A device comprising first and second coils inductively coupled to one another, means for receiving signals from a first signal source coupled to one end of said first coil, means for receiving signals from a second signal source coupled to the other end of said first coil, control means coupled to a point on said first coil, said control means being operative to provide a low impedance to said signals in the absence of simultaneous signals from said first and second signal sources, said control means being operative to provide a high impedance to said signals in response to the application of such simultaneous signals from said first and second signal sources, and output means coupled to said second coil.

12. A device comprising a pulse transformer having a primary winding and a secondary winding; means for applying signals of the same polarity to ends of said primary winding at the same and at different times; a circuit coupled to a point on said primary winding for providing a return circuit at said point to a first reference potential in the absence of simultaneous signals of a predetermined polarity applied to the ends of said primary winding, and for providing a return circuit at said point through an impedance to a second reference potential in response to the application of such simultaneous signals; and an output circuit coupled to said secondary winding.

13. The device as claimed in claim 12 wherein said return circuit comprises a resistor and diode means connected in series, and means for applying a voltage thereacross in the forward direction of said diode means, said point on said primary winding being connected to the junction of said diode means and said resistor, said diode means being poled to present a back impedance to said signals.

References Cited in the file of this patent UNITED STATES PATENTS 2,389,692 Sherwin Nov. 27, 1945 2,445,455 Rights et a1. July 20, 1948 2,695,993 Haynes Nov. 30, 1954 2,713,674 Schmitt July 19, 1955 FOREIGN PATENTS 941,547 France July 19, 1948 

